1. Field of the Invention
The present invention relates to a field emission display (FED) device, and more particularly to an FED device using a nano-scale electron emitter having low power consumption.
2. Description of Prior Art
In recent years, flat panel display devices have been developed and widely used in electronic applications such as personal computers. One popular kind of flat panel display device is an active matrix liquid crystal display (LCD) that provides high resolution. However, the LCD has many inherent limitations that render it unsuitable for a number of applications. For instance, LCDs have numerous manufacturing shortcomings. These include a slow deposition process inherent in coating a glass panel with amorphous silicon, high manufacturing complexity and low yield of units having satisfactory quality. In addition, LCDs require a fluorescent backlight. The backlight draws high power, yet most of the light generated is not viewed and simply wasted. Furthermore, an LCD image is difficult to see under bright light conditions and at wide viewing angles. Moreover, since the response time of an LCD is dependent upon the response time of a liquid crystal to an applied electrical field, the response time of the LCD is correspondingly slow. A typical response time of an LCD is in the range from 25 ms to 75 ms. Such difficulties limit the use of LCDs in many applications such as High-Definition TV (HDTV) and large displays. Plasma display panel (PDP) technology is more suitable for HDTV and large displays. However, a PDP consumes a lot of electrical power. Further, the PDP device itself generates too much heat.
Other flat panel display devices have been developed in recent years to improve upon LCDs and PDPs. One such flat panel display device, a field emission display (FED) device, overcomes some of the limitations and provides significant advantages over conventional LCDs and PDPs. For example, FED devices have higher contrast ratios, wider viewing angles, higher maximum brightness, lower power consumption shorter response time and broader operating temperature ranges when compared to conventional thin film transistor liquid crystal displays (TFT-LCDs) and PDPs.
One of the most important differences between an FED and an LCD is that, unlike the LCD, the FED produces its own light source utilizing colored phosphors. The FED does not require complicated, power-consuming backlights and filters. Almost all light generated by an FED is viewed by a user. Furthermore, the FED does not require large arrays of thin film transistors. Thus, the costly light source and low yield problems of active matrix LCDs are eliminated.
In an FED device, electrons are extracted from tips of a cathode by applying a voltage to the tips. The electrons impinge on phosphors on the back of a transparent cover plate and thereby produce an image. The emission current, and thus the display brightness, is highly dependent on the work function of an emitting material at the field emission source of the cathode. To achieve high efficiency for an FED device, a suitable emitting material must be employed.
FIG. 3 is a schematic side plan view of a conventional FED device 11. The FED device 11 is formed by depositing a resistive layer 12 on a glass substrate 14. The resistive layer 12 typically comprises an amorphous silicon base film. An insulating layer 16 comprising a dielectric material such as SiO2 is formed on the resistive layer 12 and a metallic gate layer 18 are then deposited on the insulating layer 16. The insulating layer 16 and the metallic gate layer 18 are etched to provide a plurality of cavities (not labeled). Metal microtips 21 are respectively formed in the cavities. A cathode structure 22 is covered by the resistive layer 12. The resistive layer 12 underlies the insulating layer 16; nevertheless the resistive layer 12 is still somewhat conductive. It is important to be able to control electrical resistivity of the resistive layer 12 such that it is not overly resistive but still can act as an effective resistor to prevent excessive current flow if one of the microtips 21 shorts to the metallic gate layer 18.
It is difficult to precisely fabricate the extremely small microtips 21 for the field emission source. In addition, it is necessary to maintain the inside of the electron tube at a very high vacuum of about 10xe2x88x927 Torr, in order to ensure continued accurate operation of the microtips 21. The very high vacuum required greatly increases manufacturing costs. Furthermore, a typical FED device needs a high voltage applied between the cathode and the anode, commonly in excess of 1000 volts.
In view of the above-described drawbacks, an object of the present invention is to provide a field emission display (FED) device which has low power consumption.
Another object of the present invention is to provide an FED device which has accurate and reliable electron emission.
In order to achieve the objects set above, an FED device in accordance with a preferred embodiment of the present invention comprises a cathode plate, a resistive buffer in contact with the cathode plate, a plurality of electron emitters formed on the resistive buffer and an anode plate spaced from the electron emitters thereby defining an interspace region therebetween. Each of the electron emitters substantially comprises a rod-shaped first part adjacent the buffer, and a conical second part distal from the buffer. The buffer and the first parts are made from silicon oxide (SiOx), in which x can be controlled according to the required stoichiometry. This ensures that the combined buffer and first parts has a gradient distribution of electrical resistivity such that highest electrical resistivity is nearest the cathode plate and lowest electrical resistivity is nearest the anode plate. The second parts are respectively formed on the first parts, and are made from niobium. When emitting voltage is applied between the cathode and anode plates, electrons emitted from the electron emitters traverse the interspace region and are received by the anode plate. Because of the gradient distribution of electrical resistivity, only a very low emitting voltage needs to be applied.
In an alternative embodiment, the combined buffer and first parts can incorporate more than one gradient distribution of electrical resistivity.
Other objects, advantages and novel features of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a schematic, cross-sectional view of a field emission display (FED) device in accordance with a preferred embodiment of the present invention;
FIG. 2 is an enlarged, perspective view of part of an electron emitter of the FED device in accordance with the present invention; and
FIG. 3 is a schematic, side plan view of a conventional FED device employing metallic microtips.